1. Field of the Invention
The present invention relates to a semiconductor device such as a semiconductor integrated circuit (hereinafter “IC”) chip, and more particularly to a semiconductor device furnished with an electrostatic breakdown protection capability.
2. Description of Related Art
An IC chip or the like is packaged with its input terminals, output terminals, and the like exposed to outside. If an overvoltage that has been conducted via a bonding wire and a bump is further conducted via a bonding pad (hereinafter “pad”) to an internal circuit, the internal circuit may suffer electrostatic breakdown. To prevent this, usually, an electrostatic protection device is provided between the pad and the internal circuit.
FIG. 5 is a plan view showing an example of an electrostatic protection circuit in a conventional IC chip. In FIG. 5 are shown: an input/output pad Pa via which a signal is fed in from outside or fed out to outside; an internal circuit 106; an electrostatic protection device Qa; a signal conductor Ra that connects together the input/output pad Pa and the internal circuit 106; a negative-side supply conductor 104, which is connected to a negative-side supply pad (unillustrated) to which a negative-side supply voltage (the ground voltage, equal to 0 V) is supplied; and a positive-side supply conductor 105, which is connected to a positive-side supply pad (unillustrated) to which a positive-side supply voltage Vcc (for example, 5 V) is supplied.
FIG. 6 is a schematic sectional view taken along line A-A shown in FIG. 5. In FIG. 6, metal conductive parts are indicated by hatching. As shown in FIG. 6, this IC chip has a multiple-conductor-layer structure including the following two metal conductor layers: a first metal conductor layer (hereinafter also simply “the first layer”) laid as the lower layer; and a second metal conductor layer (hereinafter also simply “the second layer”) laid as the upper layer. The input/output pad Pa is composed of a metal film 121 formed in the first layer and a metal film 122 formed in the second layer. The metal films 121 and 122 are connected together at least via a contact hole 140 formed in an insulating film 130 laid between the first and second layers. The signal conductor Ra is connected, at one end, to the metal film 122 and, at the other end, to the internal circuit 106.
Through ion injection and diffusion, in an upper portion of a silicon substrate 110, a P-type well 111 and an N-type well 112 are formed; in an upper portion of the P-type well 111, an N-type diffusion layer 113 and a P-type diffusion layer 114 are formed; and, in an upper portion of the N-type well 112, a P-type diffusion layer 115 and an N-type diffusion layer 116 are formed. The PN junction between the N-type diffusion layer 113 and the P-type well 111 forms a protection diode 117, and the PN junction between the P-type diffusion layer 115 and the N-type well 112 forms a protection diode 118. These protection diodes 117 and 118 together form the electrostatic protection device Qa.
On the silicon substrate 110 having the P-type well 111 etc. mentioned above formed therein, an insulating film 150 of silicon oxide is formed, while leaving electrically connected together: the N-type diffusion layer 113 and the metal film 121; the P-type diffusion layer 114 and the negative-side supply conductor 104; the N-type diffusion layer 116 and the positive-side supply conductor 105; and the P-type diffusion layer 115 and a metal film 142. The metal film 142 is electrically connected to the signal conductor Ra via a contact hole 141.
The metal film 121, the negative-side supply conductor 104, the positive-side supply conductor 105, and the metal film 142 are formed in the first layer; the metal film 122 and the signal conductor Ra are formed in the second layer. Typically, the second layer is thicker than the first layer, and thus the following relationship holds: (the sheet resistance of the second layer)<(the sheet resistance of the first layer). Incidentally, sheet resistance denotes the resistance of a conductor per given length and given width.
FIG. 7 shows an equivalent circuit of the structure shown in FIG. 6. When a positive overvoltage is applied via a bonding wire (unillustrated) to the input/output pad Pa, a current flows from the input/output pad Pa via the protection diode 118, the positive-side supply conductor 105, and the positive-side supply pad (unillustrated) into the Vcc supply side. On the other hand, when a negative overvoltage is applied via a bonding wire (unillustrated) to the input/output pad Pa, a current flows from ground via the negative-side supply pad (unillustrated), the negative-side supply conductor 104, and the protection diode 117 to the input/output pad Pa. In this way, the overvoltage is prevented from being applied to the internal circuit 106.
When a current flows through the protection diode 117 or 118, the voltage drop across it does not remain constant (for example, 0.7 V) irrespective of the magnitude of the current but varies due to an internal resistance and other factors. Thus, depending on the magnitude of the current, an overvoltage may reach the internal circuit 106. That is, the protection diodes 117 and 118 alone do not afford a sufficiently high level of electrostatic protection. For this reason, according to a conventionally known method, in place of or in parallel with the electrostatic protection device Qa shown in FIGS. 5 to 7, an electrostatic protection device Qb having an equivalent circuit as shown in FIG. 8 is provided.
As shown in FIG. 8, the electrostatic protection device Qb is composed of a P-channel (P-type semiconductor) MOS transistor (a field-effect transistor with an insulated gate) 118a and an N-channel (N-type semiconductor) MOS transistor 117a. The input/output pad Pa is connected to the source of the MOS transistor 118a and to the drain of the MOS transistor 117a, the supply voltage Vcc is fed via the positive-side supply conductor 105 to the gate and drain of the MOS transistor 118a, and the 0 V ground voltage is fed via the negative-side supply conductor 104 to the gate and source of the MOS transistor 117a. The input/output pad Pa and the internal circuit 106 are connected together via a signal conductor Rb.
In the circuit configured as described above, the snap-back characteristic resulting from the bipolar action (linear operation) of the MOS transistors 117a and 118a makes an overvoltage less likely to reach the internal circuit 106 even in the event of inflow of a large surge current. Thus, this circuit, as compared with one depending solely on the electrostatic protection device Qa composed of protection diodes, affords a higher level of protection against electrostatic breakdown.
Here is one problem. The negative-side and positive-side supply conductors 104 and 105 shown in FIG. 5 are formed by using the first layer, and are laid around the internal circuit 106, between a plurality of input/output pads (each like the input/output pad Pa) and the internal circuit 106, so as to be ultimately connected to the supply pads (unillustrated). With the recent trend for increasingly complicate circuit designs and hence increasingly larger IC chips, those supply conductors tend to be so long that their impedance (resistances) cannot be ignored.
What this means is as follows. Even when the electrostatic protection device functions in an ideal fashion, the high impedances across the supply conductors may allow an overvoltage to reach the internal circuit 106.
Here is another problem. An electrostatic protection device like the electrostatic protection device Qb designed to afford a higher level of protection against electrostatic breakdown is called an active clamper, of which many modified versions are known. Any of these, however, has a more complicate structure than the electrostatic protection device Qa composed of protection diodes. Thus, forming an active-clamper-type electrostatic protection device typically requires two (or more) metal conductor layers.
Accordingly, if an active clamper is built in an IC chip having a two-layer structure, it is impossible to lay a signal conductor Ra above the electrostatic protection device as shown in FIG. 5. Moreover, inherently intended to prevent an overvoltage applied to an input/output pad from reaching the internal circuit, an electrostatic protection device needs to be located close to the input/output pad. For these reasons, an active clamper cannot easily be built in an IC chip having a two-layer structure.
Even if one can, it is necessary, as shown in FIG. 9, to lay a signal conductor Rb to make a detour around the electrostatic protection device Qb so as not to overlap it, and to lay the conductors constituting the electrostatic protection device Qb so as not to short-circuit to the negative-side or positive-side supply conductor 104 or 105. Here, the signal conductor Rb is formed in the second layer, and the negative-side and positive-side supply conductors 104 and 105 are formed, as in FIG. 5, in the first layer.
Laying a single conductor to make a detour as shown in FIG. 9 increases the parasitic capacitance in the conductor, leading to a delay in the conducted signal and increased distortion in its waveform. Moreover, the part of a conductor making a detour occupies an extra area, leading to a lower degree of integration. Put the other way around, when higher priority is given to signal speed and integration degree, use of an active clamper is better avoided, although this results in a low level of protection against electrostatic breakdown (for example, as low as in the structure shown in FIGS. 5 to 7).